Quoi de neuf 2015
From Eric
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For 2015, everything is described below... | For 2015, everything is described below... | ||
| + | == August 2015 == | ||
| + | == July 2015 == | ||
| + | Playing with buildroot and my Raspberry Pi... | ||
| + | == June 2015 == | ||
| + | Nothing. | ||
| + | == May 2015 == | ||
| + | Nothing. | ||
== April 2015 == | == April 2015 == | ||
No time to do anything about "real electronics". | No time to do anything about "real electronics". | ||
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A few things, anyway: | A few things, anyway: | ||
* I have bought a new RPI 2, installed opencv on it and done a few experiments about line following using Canny and Hough. The idea is to be able to run some benchmark to compare performances of the PI with respect to a Zynq. | * I have bought a new RPI 2, installed opencv on it and done a few experiments about line following using Canny and Hough. The idea is to be able to run some benchmark to compare performances of the PI with respect to a Zynq. | ||
| - | * About the Zynq... I have also bought a Zynk board at MyIR. A nice little thingie comes with 1GiO of SDRAM, a Zynq XC7Z020 and many devices (Ethernet, Usb, a buzzer, a CAN | + | * About the Zynq... I have also bought a Zynk board at MyIR. A nice little thingie comes with 1GiO of SDRAM, a Zynq XC7Z020 and many devices (Ethernet, Usb, a buzzer, a CAN adapter, etc.). The board comes with Ubuntu pre-installed. My objective is to run some hard/soft combination at bare metal level. Hopefully, I have found a nice tutorial [https://wiki.hackerspace.pl/projects:zturn-hackers:helloworld#in_vivado here]. |
Building an application on the Zynq is quite complicated since you have to generate the configuration of the FPGA (the bitstream), a FSBL, a specific BSP, your application... to end up with the "boot.bin" file that is loaded by the board. Hopefully, Xilinx' Vivado hide most of the details. It is nice as long as it works... | Building an application on the Zynq is quite complicated since you have to generate the configuration of the FPGA (the bitstream), a FSBL, a specific BSP, your application... to end up with the "boot.bin" file that is loaded by the board. Hopefully, Xilinx' Vivado hide most of the details. It is nice as long as it works... | ||
| - | * I have done a few experiments using SystemC and SystemC AMS (the analog part). You would certainly not replace Spice by SystemC AMS, but SystemC TLM + SystemC + SystemC AMS makes it possible to model and simulate a complete system at different levels of abstraction. | + | * I have done a few experiments using SystemC and SystemC AMS (the analog part). You would certainly not replace Spice by SystemC AMS, but SystemC TLM + SystemC + SystemC AMS makes it possible to model and simulate a complete system at different levels of abstraction / models of computation. |
== March 2015 == | == March 2015 == | ||
Revision as of 21:05, 5 August 2015
Experiments carried out in the past (from 2011) are described hereafter:
"Quoi de neuf" means "What's new"...
For 2015, everything is described below...
Contents |
August 2015
July 2015
Playing with buildroot and my Raspberry Pi...
June 2015
Nothing.
May 2015
Nothing.
April 2015
No time to do anything about "real electronics".
A few things, anyway:
- I have bought a new RPI 2, installed opencv on it and done a few experiments about line following using Canny and Hough. The idea is to be able to run some benchmark to compare performances of the PI with respect to a Zynq.
- About the Zynq... I have also bought a Zynk board at MyIR. A nice little thingie comes with 1GiO of SDRAM, a Zynq XC7Z020 and many devices (Ethernet, Usb, a buzzer, a CAN adapter, etc.). The board comes with Ubuntu pre-installed. My objective is to run some hard/soft combination at bare metal level. Hopefully, I have found a nice tutorial here.
Building an application on the Zynq is quite complicated since you have to generate the configuration of the FPGA (the bitstream), a FSBL, a specific BSP, your application... to end up with the "boot.bin" file that is loaded by the board. Hopefully, Xilinx' Vivado hide most of the details. It is nice as long as it works...
- I have done a few experiments using SystemC and SystemC AMS (the analog part). You would certainly not replace Spice by SystemC AMS, but SystemC TLM + SystemC + SystemC AMS makes it possible to model and simulate a complete system at different levels of abstraction / models of computation.
March 2015
(see above)
February 2015
(see above)
January 2015
- 10/01/2015
- I have started a small experiment with sound synthesis chips. Right now, I have hooked a YM2612 to an Atmega. My objective is to be able to read and play VGM files.
- To familiarize myself with VGM, I am writing a small VGM parser in Python.
- There are quite a large number of sound synthesis chips: SN76482, the Yamaha family (YM2608, YM2612, YM2149, YMF262, etc.), the AY-3-8912, etc. Wikipedia has a very good set of articles about those sound chips.
