Quoi de neuf 2022
From Eric
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* Playing with one of my Colorlight 5a-75B v8.0 board. [[File:colorlight.jpg|400px|thumb|none]] | * Playing with one of my Colorlight 5a-75B v8.0 board. [[File:colorlight.jpg|400px|thumb|none]] | ||
* Those boards are fitted with a Lattice ECP5 FPGA that can be programmed using the opensource yosys + Treillis + Icestorm + abc + nxpnr + ... toolchain. | * Those boards are fitted with a Lattice ECP5 FPGA that can be programmed using the opensource yosys + Treillis + Icestorm + abc + nxpnr + ... toolchain. | ||
| - | * I use it to drive a HUB75 64x128 led panel that uses a ABC addressing scheme. I have managed to display an image, but there are still some timing bugs (the blue line in the middle of the image is not expected...). | + | * I use it to drive a HUB75 64x128 led panel that uses a ABC addressing scheme. |
| + | * I have managed to display an image, but there are still some timing bugs (the blue line in the middle of the image is not expected...). | ||
| + | * I am still messing with the DPRAM (yosys is not capable to infer the use of DPRAM blocks when the memory is fully dual ported. So I am going to use directly the DP16K memory module... | ||
[[File:ecp5_64_128_led_panel.jpg|400px|thumb|none]] | [[File:ecp5_64_128_led_panel.jpg|400px|thumb|none]] | ||
* More information can be found [https://onedrive.live.com/redir?resid=528791E823E13E0%21227120&page=Edit&wd=target%28To%20be%20sorted.one%7C05010110-da50-4d9d-8592-5d963f72b196%2FColorlight%20board%7Cd535355a-ce9d-4897-ac37-3dd982a2cdbb%2F%29&wdorigin=703 here]. | * More information can be found [https://onedrive.live.com/redir?resid=528791E823E13E0%21227120&page=Edit&wd=target%28To%20be%20sorted.one%7C05010110-da50-4d9d-8592-5d963f72b196%2FColorlight%20board%7Cd535355a-ce9d-4897-ac37-3dd982a2cdbb%2F%29&wdorigin=703 here]. | ||
Revision as of 15:59, 20 February 2022
Experiments carried out in the past (from 2011) are described hereafter: 2021, 2020, 2019, 2018, 2017, 2016, 2015, 2014, 2013, 2012, 2011
February
- Playing with one of my Colorlight 5a-75B v8.0 board.
- Those boards are fitted with a Lattice ECP5 FPGA that can be programmed using the opensource yosys + Treillis + Icestorm + abc + nxpnr + ... toolchain.
- I use it to drive a HUB75 64x128 led panel that uses a ABC addressing scheme.
- I have managed to display an image, but there are still some timing bugs (the blue line in the middle of the image is not expected...).
- I am still messing with the DPRAM (yosys is not capable to infer the use of DPRAM blocks when the memory is fully dual ported. So I am going to use directly the DP16K memory module...
- More information can be found here.
January
- Making a box for my "laser game" using FreeCad and the "Laser Cut Interlocking Extension":The aim of the game is to shoot "asteroids" using a "ship" that you can accelerate and drive left / right. It uses a laser galvo and an Arduino. Some details can be found here.
- I am investigating building another "game" using, this time, a LED display (those described in Quoi de neuf 2020, December). See e.g. here.
- I have designed a basic PCB to implement the NRF51822-baased door-/window- opening detector.
- I have spent some time investigating at the extremely cheap PADAUK chips. Unfortunately, the cheapest ones are not available at the current time (absolutely simple)...
